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Intel® 7500 Scalable Memory Buffer BSDL

Boundary-Scan Description Language (BSDL) file
• Manufacturer: Intel Corporation
• Component: Millbrook-1 Memory Buffer
• Package(s): BGA (Ball Grid Array)
• Version: For MB1 C0-Step (Rev0.3)
• Date: 06/18/2009
• Entity name: mb1_top (Based on top level verilog module

There is a sequencing requirement for VCCPWRGOOD and VDDPWRGOOD signals. It needs to follow the timing diagram titled "Cold Power Up Reset" in chapter titled "Resets" of the Millbrook-1 EDS.

Read the full Intel® 7500 Scalable Memory Buffer BSDL Sheet.

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