Quartus® II Tcl Version Number in Verilog Register Bank



This example procedure generates a Verilog file with a hexadecimal value stored in a bank of registers. You can use this procedure to automate writing small amounts of data (such as a revision number) to a register bank in your design.

The generated Verilog file is named version_reg.v. Call the procedure with the hexadecimal number you want stored in the register bank. There is an example of how to call the procedure at the bottom of this page.

When you call the procedure in a Tcl script, you should wrap the procedure call in a catch statement because the procedure returns an error if there are problems creating the Verilog file. You can catch the error and display it.

proc generate_verilog { hex_value } {

    set num_digits [string length $hex_value]
    set bit_width [expr { 4 * $num_digits } ]
    set high_index [expr { $bit_width - 1 } ]
    set reset_value [string repeat "0" $num_digits]

    if { [catch {
        set fh [open "version_reg.v" w ]
        puts $fh "module version_reg (clock, reset, data_out);"
        puts $fh "    input clock;"
        puts $fh "    input reset;"
        puts $fh "    output \[$high_index:0\] data_out;"
        puts $fh "    reg \[$high_index:0\] data_out;"
        puts $fh "    always @ (posedge clock or negedge reset) begin"
        puts $fh "        if (!reset)"
        puts $fh "            data_out <= ${bit_width}'h${reset_value};"
        puts $fh "        else"
        puts $fh "            data_out <= ${bit_width}'h${hex_value};"
        puts $fh "    end"
        puts $fh "endmodule"
        close $fh
    } res ] } {
        return -code error $res
    } else {
        return 1


Using a Catch Statement

The following is an example of how to call the procedure above and catch any errors:

set my_hex_number "A5"
if { [catch { generate_verilog $my_hex_number } res] } {
    post_message -type error "Couldn't generate Verilog file\n$res"
# If the script gets here, there were no errors.