Why doesn’t the output frequency of the System PLL match the setting in the GTS System PLL Clocks IP?

Due to a device problem, some reference clock frequency options in the dropdown list in the IP are no longer valid for certain output frequencies. Selecting the invalid reference clock options will result in incorrect System PLL output frequencies. However, the System PLL lock status signal remains asserted.

Download the TCL script (find_mcnt.tcl)  to determine whether the reference clock frequency selected in the GTS System PLL Clocks IP is valid. If the reference clock frequency is not valid, the script recommends the following workarounds:

1. List of alternate reference clock frequencies while keeping the same output frequency.
2. Two alternate higher System PLL output frequencies while keeping the same reference clock frequency. You need to run the transceiver channels driven by the impacted System PLLs in custom cadence mode.
3. In certain cases, the script will suggest that the same output & input clock frequencies can be retained. This option is possible only if you install the patch for the Quartus® Prime Pro Edition Software version 25.3 or migrate to future Quartus Prime Pro Edition Software versions.

Copy the TCL script (find_mcnt.tcl) to each of the generated IP folders of the GTS System PLL Clocks IP in your Quartus Prime Pro Edition Software project. For the Linux* operating system, change directory to the IP folder and execute the command "tclsh find_mcnt.tcl". For Windows* operating system, run the script from the Tcl Console within the Quartus Prime Pro Edition Software GUI.

A patch is available to fix this problem for the Quartus Prime Pro Edition software version 25.3. Download and install Patch 0.15 from the appropriate link below.

• Download patch 0.15 for Windows and Linux

Recommended actions:

The invalid reference clock frequency options will be removed in a future Quartus Prime Pro Edition Software version.