Article ID: 000102034 Content Type: Errata Last Reviewed: 10/06/2025

Does the PTP functionality in the Low Latency Ethernet 10G MAC FPGA IP for the USXGMII variant work correctly?

Environment

    Intel® Quartus® Prime Pro Edition
    Low Latency Ethernet 10G MAC Intel® FPGA IP
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Description

Due to a problem in the Quartus® Prime Pro Edition software version 25.3 and earlier, when the  Low Latency Ethernet 10G MAC FPGA IP is configured for 10M/100M/1G/2.5G/5G/10G (USXGMII) speed mode, the PTP functionality does not work correctly.

When both "tx_etstamp_ins_ctrl_checksum_correct" and "tx_etstamp_ins_ctrl_timestamp_insert" signals are asserted, the timestamp and checksum (Extended Byte (EB)) are inserted into the packet. Although the fractional nanoseconds are intended to be updated in the packet, this update may not be properly reflected in the EB calculation.

Resolution

There is no workaround for this problem.

It is scheduled to be fixed in a future release of the Quartus® Prime Pro Edition software.

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