Due to a problem in the optimization process of the ARM* GCC compiler, versions 12.2 and higher, the Arm Trusted Firmware (ATF) SD/eMMC Cadence* driver for Agilex™ 5 FPGA and Agilex™ 3 FPGA devices, in Quartus® Prime Pro Edition releases 25.1.1 and earlier, fails to send commands to SD cards or eMMC devices. This results in a boot failure with an error signature similar to:
ERROR: SD host controller send command failed, SRS12 = 2008000
NOTICE: Timeout occur data and cmd line 1ff02f6
PANIC at PC : 0x0000000000000e40
The error indicates a failure in an ADMA2 (Advanced DMA Version 2) read/write transfer during data transfer to or from the SD card or eMMC device. The root cause is an improper memory alignment of the ADMA2 descriptor address, which requires 8-byte alignment for 64-bit addressing mode. The ARM* GCC compiler's optimization in versions 12.2 and above introduces this misalignment, causing the failure.
This problem may occur in any boot flow where ATF is used as the primary bootloader and attempts to access the SD/eMMC device, including the ATF to Linux* Direct boot flow.
To work around this problem, you can implement one of the following options:
-
In the ATF Cadence* SD/eMMC driver, force the list of descriptors to be aligned to 8 bytes as shown:
In drivers/cadence/emmc/cdns_sdmmc.c, replace:
#ifdef CONFIG_DMA_ADDR_T_64BIT struct cdns_idmac_desc cdns_desc[CONFIG_CDNS_DESC_COUNT];
With:
#ifdef CONFIG_DMA_ADDR_T_64BIT struct cdns_idmac_desc cdns_desc[CONFIG_CDNS_DESC_COUNT] __aligned(8);
-
Use ARM* GCC compiler version 11.3 or earlier to build ATF.
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Disable optimizations when building ATF using the compilation switch CFLAGS="-O0". Note that disabling optimization may lower performance and increase boot time.
This problem is scheduled to be fixed in a future release of the Quartus® Prime Pro Edition Software.