Article ID: 000100996 Content Type: Error Messages Last Reviewed: 04/15/2025

Why do I see "Error(18108): Can't place multiple pins assigned to pin location" in my design with Partial Reconfiguration?

Environment

    Intel® Quartus® Prime Pro Edition
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Description

In projects with Partial Reconfiguration (PR) enabled, you might encounter the error message "Error(18108): Can't place multiple pins assigned to pin location" when you use the device AVST pins as dual-purpose mode.

Resolution

When you use PR External Host, the AVST pins are reserved for configuration and reconfiguration purposes; they are not available for dual purposes. Re-assign your pin locations to avoid this error. 

The AVST pins as dual-purpose are accessible when you use PR Internal Host. To avoid this error, include the following assignment in your Quartus® Settings File (.qsf): 

set_global_assignment -name FORCE_AVST_DUAL_MODE_PINS_FOR_PR ON

The assignment is available starting in the Quartus® Prime Pro Edition Software version 24.1.

Related Products

This article applies to 3 products

Intel® Stratix® 10 FPGAs and SoC FPGAs
Intel® Arria® 10 FPGAs and SoC FPGAs
Intel® Cyclone® 10 GX FPGA

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