Due to a problem in the P-Tile Avalon® Streaming FPGA IP for PCI Express*, the generated P-Tile Avalon® Streaming FPGA IP for PCI Express* Design Example will fail to launch in Debug Toolkit, with the following Error Message.
error : ptile_debug_toolkit_avst: dut: can't read "conn": no such variable
To work around this problem, update the generated Quartus Setting File (*.qsf file) for the P-Tile Avalon® Streaming FPGA IP for PCI Express* Design Example with the following constraints manually and re-run the compilation.
$ set_location_assignment PIN_CU24 -to xcvr_reconfig_clk_clk
$ set_instance_assignment -name IO_STANDARD "TRUE DIFFERENTIAL SIGNALING" -to xcvr_reconfig_clk_clk
$ set_global_assignment -name ACTIVE_SERIAL_CLOCK AS_FREQ_115MHZ_IOSC
This information will be updated in a future release of the P-Tile Avalon Streaming FPGA IP for PCI Express User Guide.