This error might be seen during the Analysis & Synthesis stage when migrating a design from Quartus® Prime Pro Edition Software 23.2 and earlier to a newer version of Quartus® Prime Pro Edition Software. This problem occurs when the migrated design contains ambiguous directionality in at least one set of ports.
Example port directionality from left to right with decreasing level of design hierarchy:
bidir (top-level) <- -> bidir <- -> output <- -> bidir <- -> IO Primitive
A port mismatch is identified in the 3rd level of hierarchy.
This occurs when an upper-level bidirectional pin is directly connected to either an output or input pin on a lower-level hierarchy, implicitly causing the downstream ports to lose bidirectionality.
To work around this problem in the Quartus® Prime Pro Edition Software 23.3 and later, examine the path from the top-level bidirectional pin to the path identified in the error message.
Ensure there are no incorrectly driven connections between port hierarchies.