Description
Due to a limitation of R-Tile Avalon® Streaming FPGA IP for PCI Express*, you might observe completion timeout error and system hang up if user logic can't handle the rx credit interface properly for the inbound MCTP message, because R-Tile Avalon® Streaming FPGA IP for PCI Express* doesn't handle MCTP credit internally.
Resolution
To work around this problem, disable the MCTP option in the BIOS setting or enhance the user logic for MCTP message credit handling.