Why does Link Training fail to complete when using the F-Tile Ethernet FPGA Hard IP using FGT PMAs and the Auto-negotiation and link training (AN/LT) enabled?

Due to a problem in the Quartus® Prime Pro Edition Software version 24.1, Link Training(LT) will fail to complete when using the F-Tile Ethernet FPGA Hard IP variant when using FGT PMAs and ANLT is enabled. This problem can occur following a restart of link training if the “link fail” timer expires or when the link is restarted and your "link fail” timer has been disabled.

To determine if this problem causes link failure, perform the following steps while in the failed state:

1. Read register offset 0x3C0 on the “i_kr_reconfig” Avalon-MM(AVMM) bus of the F-Tile Auto-Negotiation and Link Training for Ethernet FPGA IP.
2. If the read data is 32’h60, then the link failure was caused by this problem.

To work around this problem when in the failed state, use the “FGT Attribute Access Method” outlined in the “F-Tile Architecture and PMA and FEC Direct PHY IP User Guide” to reset each lane in your IP variant. 

This command per lane should use Opcode = 0xF and Data = 0x8.

After you have reset each lane in your IP variant, link training should be completed normally.  

This problem is fixed beginning with the Quartus® Prime Pro Edition Software version 24.2.