Article ID: 000097642 Content Type: Troubleshooting Last Reviewed: 12/14/2023

Why does the “Specify the simulation tool executable location” error appear when compiling the simulation libraries in Questa* Intel® FPGA Edition?

Environment

  • Intel® Quartus® Prime Pro Edition
  • Questa*-Intel® FPGA Edition
  • Windows 11* Family, Windows® 10 family

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    Description

    Due to a problem in the Intel® Quartus® Prime Pro Edition Software version 23.3 and earlier, the EDA simulation compiler might be unable to find the simulation tool location when trying to compile libraries with Questa* Intel® FPGA Edition because the latest version doesn't contain "Sim" in the tool name. Hence, it is considered not valid in the tool checking logic.

    This problem only occurs when using the Intel® Quartus® Prime Pro Edition Software on Windows* OS.

     

     

    Resolution

    To work around this problem follow the steps below in the specified order:

     

    Before launching the library compiler:

    Specify your EDA simulator and executable path by typing the following Tcl package command in the Intel® Quartus® Prime tcl shell window:

    set_user_option -name EDA_TOOL_PATH_QUESTASIM <questasim executable path (e.g. C:/intelFPGA_pro/23.2/questa_fe/win64)>

    set_global_assignment -name EDA_SIMULATION_TOOL "QuestaSim (Verilog)"

     

    After typing those tcl commands, follow the next instructions in the specified order:

    1. On the Tools menu, click Launch Simulation Library Compiler.
    2. Don't click or change anything on the "tool name" or "executable location" tab since they are already filled due to the tcl commands previously typed.
    3. Under Library families, select one or more family names and move them to the Selected Families list.
    4. Under Library language, select Verilog, VHDL, or both.
    5. In the Output directory field, specify a location to store the compiled libraries.
    6. Click on the executable location tab (without changing anything, the location will already be there as we set it before with the tcl commands) - NOTE: this is an important step and should be done only once before starting the compilation step
    7. Click on Start compilation - the compilation will start

     

    Note: Once the simulation model compilation starts, the compilation may take from 15 minutes to an hour, depending on your system. Although the compilation messages may appear paused or incomplete, the compilation is still running correctly.

     

    This problem is fixed beginning with the Intel® Quartus® Prime Pro Edition Software version 23.4

    Related Products

    This article applies to 1 products

    Intel® Programmable Devices