Article ID: 000095890 Content Type: Troubleshooting Last Reviewed: 08/01/2023

Why is the dangling signal with perserve_for_debug attribute still optimized away after compilation?

Environment

  • Intel® Quartus® Prime Pro Edition
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    Due to a problem in the Intel® Quartus® Prime Pro Edition Software v22.3 and earlier, you might see the dangling signal is optimized away, although it has preserve_for_debug synthesis attribute.

    Resolution

    To work around this problem, connect the dangling signal to the top-level pin to avoid synthesis optimization. 

    This problem is fixed starting with the Intel® Quartus® Prime Pro Edition Software version 22.4.

    Related Products

    This article applies to 2 products

    Intel Agilex® 7 FPGAs and SoC FPGAs
    Intel® Stratix® 10 FPGAs and SoC FPGAs