Article ID: 000092621 Content Type: Error Messages Last Reviewed: 06/26/2025

Why does my RiscFree fail to run debug using the Nios® V "GSFI Bootloader Example Design"?

Environment

    Intel® Quartus® Prime Pro Edition
BUILT IN - ARTICLE INTRO SECOND COMPONENT
Description

In the RiscFree IDE for Intel® FPGAs software version 22.2 and earlier, you may see "'Launching app.elf' has encountered a problem."

"Error in GDB server launch sequence" or "Error occurred during enumeration of RISC-V harsts (no harts found)."

 

Resolution

This problem is scheduled to be fixed in a future release of the RiscFree* IDE for Intel® FPGAs.

 

 

 

Related Products

This article applies to 5 products

Intel® Stratix® 10 SX SoC FPGA
Intel® Cyclone® 10 FPGAs
Intel® Stratix® 10 AX SoC FPGA
Intel Agilex® 7 FPGAs and SoC FPGAs F-Series
Intel® Arria® 10 SX SoC FPGA

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