Article ID: 000091459 Content Type: Troubleshooting Last Reviewed: 07/14/2022

Why do I see momentary decremented credit count on the TX Flow Control Interface of the P-Tile Avalon® Streaming Intel® FPGA IP for PCI Express?

Environment

  • Intel® Quartus® Prime Pro Edition
  • Interfaces
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    Due to a problem in the Intel® Quartus® Prime Pro Edition Software version 22.2 and earlier version, you may see momentary decremented credit count on TX Flow Control Interface of the P-Tile Avalon® Streaming Intel® FPGA IP for PCI Express. The impact of this issue is limited to the decremented credit count itself as the correct credit count value will be reflected in the next clock cycle and does not affect the overall credit tracking integrity in the intellectual property (IP). 

    Resolution

    To work around this problem, implement a credit count filter in user logic that compares the current credit count value with the previous credit count value to invalidate decremented credit count value.

    This problem is scheduled to be fixed in a future release of the Intel® Quartus® Prime Pro Edition Software.

    Related Products

    This article applies to 2 products

    Intel® Stratix® 10 DX FPGA
    Intel® Agilex™ 7 FPGAs and SoC FPGAs F-Series

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