Article ID: 000090599 Content Type: Troubleshooting Last Reviewed: 01/11/2023

Why does the o_rx_pcs_ready signal fail to assert during a simulation of the F-Tile Ethernet Multirate Intel® FPGA IP Dynamic Reconfiguration when the startup profile is using a subset of the FGT PMAs within the reconfiguration group.

Environment

  • Intel® Quartus® Prime Pro Edition
  • Interfaces
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    Description

    Due to a problem in the Intel® Quartus® Prime Pro Edition Software version 22.1, o_rx_pcs_ready will fail to assert during simulation of the F-Tile Ethernet Multirate Intel® FPGA IP Dynamic Reconfiguration Design Example when the startup profile is using a subset of the FGT PMAs within the reconfiguration group.

    For example, if using the F-Tile Ethernet Multirate Intel® FPGA IP with the 100GE-4 Reconfigurable reconfiguration group and using the 100GE-2 profile as your startup profile (the startup profile is using 2 out of 4 FGT transceivers in the reconfiguration group).

    Resolution

    To work around this problem in simulation, ensure that the startup profile uses a superset of FGT transceivers for all the dynamic reconfiguration profiles in the design.

    This problem is scheduled to be fixed in a future release of the Intel® Quartus® Prime Pro Edition Software.

    Related Products

    This article applies to 1 products

    Intel® Agilex™ 7 FPGAs and SoC FPGAs I-Series

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