Article ID: 000090545 Content Type: Troubleshooting Last Reviewed: 05/23/2022

Why are 100GE-2 FEC uncorrected codewords not counted correctly when using the Intel® Agilex™ E-tile Hard IP Ethernet Toolkit?

Environment

  • Intel® Quartus® Prime Pro Edition
  • Ethernet Link Inspector
  • E-tile Hard IP for Ethernet Intel® FPGA IP
  • Windows® 10, 64-bit*

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    Description

    Due to a problem in the Ethernet Toolkit software, when you intantiate a 100G-2 PAM4 in E-tile Hard IP for Ethernet Intel® FPGA IP on Intel® Agilex™ FPGA and observe uncorrected codewords in the Intel® Agilex™ E-tile Hard IP Ethernet Toolkit GUI, the count value will always be 0.

    The correct value can be read from the forward error correction (FEC) register 0x220.

    Resolution

    This issue is scheduled to be fixed in a future release of the Intel® Quartus® Prime Pro Edition Software.

    Related Products

    This article applies to 1 products

    Intel® Agilex™ 7 FPGAs and SoC FPGAs

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