Description
Due to a problem in the Ethernet Toolkit software, when you instantiate a 100G-2 PAM4 in E-tile Hard IP for Ethernet Intel® FPGA IP on Intel Agilex® 7 FPGA and observe uncorrected codewords in the Intel Agilex 7 E-tile Hard IP Ethernet Toolkit GUI, the count value will always be 0.
The correct value can be read from the forward error correction (FEC) register 0x220.
Resolution
This problem is fixed starting with the Intel® Quartus® Prime Pro Edition Software version 22.3.