Due to a problem in the Intel® Quartus® Prime Standard Edition Software version 21.1, the error message above may be seen while executing 'generate HDL' for the Error Message Register Unloader Intel® FPGA IP Core when using Intel® Stratix® V, Intel® Arria® V, or Intel® Cyclone® V devices. The full error message is shown below:
Error: SDC_ENTITY not allowed for EFileKind, must be in {[VERILOG, VERILOG_ENCRYPT, SYSTEM_VERILOG, SYSTEM_VERILOG_ENCRYPT, VERILOG_INCLUDE, SYSTEM_VERILOG_INCLUDE, VHDL, VHDL_ENCRYPT, SDC, MIF, HEX, DAT, QXP, HPS_ISW, PLI_LIBRARY, VPI_LIBRARY, FLI_LIBRARY, OTHER]}
while executing
"add_fileset_file $sdc_file SDC_ENTITY PATH $sdc_file {NO_AUTO_INSTANCE_DISCOVERY NO_SDC_PROMOTION}"
(procedure "generate_verilog_fileset" line 24)
invoked from within
"generate_verilog_fileset $name $ifdef_params_list"
(procedure "generate_synth" line 9)
invoked from within
"generate_synth altera_emr_unloader"
A patch is available to fix this problem for the Intel® Quartus® Prime Standard Edition Software version 21.1
Download and install Patch 0.08std for the Intel® Quartus® Prime Standard Edition Software version 21.1 from the appropriate link below:
(To download the .run file, right-click on the above link and choose “Save link as”)
Intel® Quartus® Prime Standard Edition Software version 21.1 patch:
- Download patch 0.08std for Windows (.exe)
- Download patch 0.08std for Linux (.run)
- Download the Readme for patch 0.08std (.txt)
This problem is fixed starting from Intel® Quartus® Prime Standard Edition Software version 22.1.