Article ID: 000088538 Content Type: Troubleshooting Last Reviewed: 12/07/2021

Why can't Cypress NAND flash be recognized by Cyclone® V SoC FPGAs?

Environment

Bug ID: 00551313/15010274273

Quartus Edition

Intel® Quartus® Prime Standard Edition

Version Found: 16.1 Version Fixed: 22.4

Documentation Documentation ID: PCG-01014-3.1 Version Found: 2021-02-18

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Description

Cypress NAND flash might not be recognized by Cyclone® V SoC FPGAs if you have followed the Cyclone® V GX, GT, E, SX, ST and SE Device Family Pin Connection Guidelines, which recommends connecting NAND_RB through a 1KΩ -10KΩ pull-up resistor to VCCPD_HPS.

Resolution

For Cypress NAND flash, it is recommended to connect NAND_RB through a 10KΩ -50KΩ pull-up resistor to VCCPD_HPS.

The Cyclone® V GX, GT, E, SX, ST and SE Device Family Pin Connection Guidelines will be updated with this information in a future release.

Related Products

This article applies to 3 products

Cyclone® V SE SoC FPGA

Cyclone® V ST SoC FPGA

Cyclone® V SX SoC FPGA

Description
Resolution

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