Article ID: 000087477 Content Type: Troubleshooting Last Reviewed: 10/11/2023

How do I access the configuration space registers of the Intel® L- and H-tile Avalon® Streaming IP for PCI Express* in root port mode?

Environment

  • Intel® Quartus® Prime Pro Edition
  • Avalon-ST Intel® Stratix® 10 Hard IP for PCI Express
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    Description

    When using the Intel® L- and H-tile Avalon® Streaming IP for PCI Express* in root port mode, the hip reconfiguration interface must be enabled to access root port configuration space registers.

     

     

    Resolution

    There is no plan to change the IP setting and messages. Users need to enable the hip reconfiguration interface in root port mode when accessing configuration space registers.

    Related Products

    This article applies to 3 products

    Intel® Stratix® 10 GX FPGA
    Intel® Stratix® 10 SX SoC FPGA
    Intel® Stratix® 10 TX FPGA

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