Article ID: 000087477 Content Type: Troubleshooting Last Reviewed: 12/16/2021

How do I access the configuration space registers of the Intel® L- and H-tile Avalon® Streaming IP for PCI Express* in root port mode?

Environment

  • Intel® Quartus® Prime Pro Edition
  • Avalon-ST Intel® Stratix® 10 Hard IP for PCI Express
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    When using the Intel® L- and H-tile Avalon® Streaming IP for PCI Express* in root port mode, the hip reconfiguration interface needs to be enabled to access root port configuration space registers.

    Resolution

    In a future version of the Intel® Quartus® Prime Design Software release, an error message will be reported in Intel® Quartus® Prime Design Software if the hip reconfiguration interface is not enabled in root port mode. 

    Related Products

    This article applies to 3 products

    Intel® Stratix® 10 GX FPGA
    Intel® Stratix® 10 SX SoC FPGA
    Intel® Stratix® 10 TX FPGA

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