Article ID: 000087117 Content Type: Troubleshooting Last Reviewed: 11/24/2011

DDR2 and DDR3 SDRAM Controller with UniPHY Simulation Fails in Riviera

Environment

    Quartus® II Subscription Edition
    Simulation
BUILT IN - ARTICLE INTRO SECOND COMPONENT

Critical Issue

Description

Simulations with the Riviera software fail.

Resolution

To work around this issue, modify the following lines in rand_burstcount_gen.sv� outside of the generate block:�

localparam MIN_EXPONENT= ceil_log2(MIN_BURSTCOUNT);� localparam MAX_EXPONENT= log2(MAX_BURSTCOUNT);� localparam EXPONENT_WIDTH= ceil_log2(MAX_EXPONENT);

Related Products

This article applies to 1 products

Intel® Programmable Devices

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