Article ID: 000086920 Content Type: Troubleshooting Last Reviewed: 08/11/2016

Why do reads from the last byte address on my EPCQ device fail?

Environment

  • Intel® Quartus® Prime Pro Edition
  • Intel® SoC FPGA Embedded Development Suite (SoC EDS) Pro Edition
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    Description

    Due to a problem in the Altera Nios® II HAL driver for the Altera EPCQ IP, you may be not be able to read the last byte of EPCQ devices using the following command:
    alt_read_flash (fd, 0xFFFFFF, ch, 1);  where  (0xFFFFFF is last byte address of EPCQ)

    The function will error with a return value off -22 when reading last byte of EPCQ. (If the command is successful, the return value is 0).

    Resolution

    The Nios II HAL driver for the code of the EPCQ driver has a variable called end_address. This variable was incorrectly assumed non-inclusive.

    To fix this problem:

    In the Quartus® Prime software 15.0 and above change line 730,  In Quartus Prime software
    14.1 and below change line 611 as follows to remove the = in the compare:

     end_address > epcq_flash_info->data  

    This problem is scheduled to be fixed in a future release of the Quartus software.

    Related Products

    This article applies to 6 products

    Cyclone® V SX SoC FPGA
    Arria® V SX SoC FPGA
    Arria® V ST SoC FPGA
    Cyclone® V ST SoC FPGA
    Cyclone® V SE SoC FPGA
    Intel® Arria® 10 SX SoC FPGA

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