Description
Due to a problem in the Intel® Quartus® Prime Pro Edition Software version 19.3, you may see this error during synthesis. This error occurs in designs that include embedded memory IPs with the RAM_BLOCK_TYPE set to M20K and has been upgraded from version 19.2.
The following embedded memory IPs are affected
- RAM: 1-PORT Intel FPGA IP
- RAM: 2-PORT Intel FPGA IP
- RAM: 4-PORT Intel FPGA IP
- ROM: 1-PORT Intel FPGA IP
- ROM: 2-PORT Intel FPGA IP
Only designs targeting Intel® Stratix® 10, Intel® Arria® 10 and Intel® Cyclone® 10 GX are affected.
Resolution
To work around this problem, either recreate the RAM IP in version 19.3 or upgrade the IP from version 19.1
This problem is scheduled to be fixed in a future release of the Intel® Quartus® Prime Pro Edition Software.