Article ID: 000086530 Content Type: Error Messages Last Reviewed: 06/19/2017

Error: board.pipe_stage_host_ctrl.m0: alt_pr.avmm_slave cannot be at 0xcfb0 (0xcf80 or 0xcfc0 are acceptable)

Environment

  • Intel® Arria® 10 FPGAs and SoC FPGAs
  • Intel® Quartus® Prime Pro Edition
  • Intel® FPGA SDK for OpenCL™
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    Due to a problem in the Arria® 10 GX FPGA Development Kit Reference Platform (a10_ref), you may see some errors when you open board.qsys and generate your Qsys system.

    Example of error messages: 

    Error: board.pipe_stage_host_ctrl.m0: alt_pr.avmm_slave cannot be at 0xcfb0 (0xcf80 or 0xcfc0 are acceptable)
    Error: board.pipe_stage_host_ctrl.m0: version_id.s (0xcfc0..0xcfc3) overlaps alt_pr.avmm_slave (0xcfb0..0xcfef)

    Resolution

    To work around this problem, you can change the address of alt_pr.avmm_slave using Qsys and then apply same modification to linux64/driver/hw_pcie_constants.h with a text editor. For example you can choose 0xcf00 as the address of alt_pr.avmm_slave.

    This problem is scheduled to be fixed in a future release of the Intel® FPGA SDK for OpenCL™. 

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