Due to a problem in the Arria® 10 GX FPGA Development Kit Reference Platform (a10_ref), you may see some errors when you open board.qsys and generate your Qsys system.
Example of error messages:
Error: board.pipe_stage_host_ctrl.m0: alt_pr.avmm_slave cannot be at 0xcfb0 (0xcf80 or 0xcfc0 are acceptable)
Error: board.pipe_stage_host_ctrl.m0: version_id.s (0xcfc0..0xcfc3) overlaps alt_pr.avmm_slave (0xcfb0..0xcfef)
To work around this problem, you can change the address of alt_pr.avmm_slave using Qsys and then apply same modification to linux64/driver/hw_pcie_constants.h with a text editor. For example you can choose 0xcf00 as the address of alt_pr.avmm_slave.
This problem is scheduled to be fixed in a future release of the Intel® FPGA SDK for OpenCL™.