Due to a problem in the Intel® Quartus® Prime Pro edition software, you may get incorrect results in hardware when using the LPM_ADD_SUB IP core for Intel Stratix® 10 devices. The problem occurs only when a pipeline stage of greater than 1 is used. The simulation yields correct results.
To work around the problem, use pipeline stage of 1 or 0.
This problem is scheduled to be fixed in a future release of the Intel® Quartus® Prime software.