Article ID: 000086109 Content Type: Troubleshooting Last Reviewed: 10/08/2012

If I am using voltage referenced I/O standards in Cyclone through Cyclone IV devices, can any of the VREF pins be used as I/O pins in an I/O bank containing voltage referenced input pins?

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Description Yes, in Cyclone® through Cyclone IV devices you may be able to use some VREF pins as I/O pins in I/O banks containing voltage referenced input pins.  The VREF pins are the voltage reference for a VREF group segment, and all VREF pins within a segment are shorted together.  The VREF pins for segments not using voltage referenced input pins within the same I/O bank can be used as regular I/O pins. 

For example, if you have SSTL 2 Class II input pins in I/O bank 1 and they are all placed in the VREFB1N0 group, then the VREFB1N0 pin will need to be powered with 1.25V to support the SSTL 2 input standard.  If the remaining VREFB1N[x] groups (if available for your device) do not have voltage referenced input pins, then the remaining VREFB1N[x] pins (if available for your device) can be used as I/O pins.

Dual purpose VREF pins when used as I/O pins are not shorted with other VREF pins in the same I/O bank. They are only shorted when used for VREF functionality.

If you are using multiple VREF groups within the same I/O bank, the VREF pins for each group must be connected to the same voltage level. 

To understand I/O pin placement with respect to VREF groups, you can refer to the Quartus® II software Pin Planner or the device pin-out file.

Related Products

This article applies to 6 products

Cyclone® FPGAs
Cyclone® II FPGA
Cyclone® III FPGAs
Cyclone® III LS FPGA
Cyclone® IV E FPGA
Cyclone® IV GX FPGA