Article ID: 000086088 Content Type: Error Messages Last Reviewed: 08/20/2018

Fatal Error: Segment Violation at 0x8

Environment

  • Intel® Quartus® Prime Pro Edition
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    Due to a problem in the Intel® Quartus® Prime Pro edition software, you may see this error in the fitter stage. This error occurs when a virtual pin assignment is set to the pll_ref_clk pin of the High Bandwidth Memory (HBM2) Interface Intel® FPGA IP in an Intel® Stratix® 10 MX device.

    The pll_ref_clk pin must be connected to the dedicated pin and a virtual pin assignment cannot be used for this pin.

    Resolution

    To work around this problem, remove the virtual pin assignment from the pll_ref_clk pin of the HBM2 Interface Intel FPGA IP and connect it to a dedecated pll_ref_clk pin.

    This problem is scheduled to be fixed in a future release of the Intel® Quartus® Prime Pro Edition software.

    Related Products

    This article applies to 1 products

    Intel® Stratix® 10 MX FPGA

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