Are there any known problems when trying to simulate the Quartus II software versions 12.1, or 12.1sp1 10GBASE-KR PHY IP in Cadence ncsim?

Yes, If you try and simulate the Quartus® II software versions 12.1 or 12.1sp1 10GBASE-KR PHY Intel® FPGA IP in Cadence NCSIM, the following errors might be seen:

Error:
…
ncelab: *W,STARMT: This @* expands to empty list, will never wake up.
ncelab: *W,STARMT: This @* expands to empty list, will never wake up.
ncelab: *E,CUVMOC: illegal mix of varibles and nets in concatenation expression connected to an output port.
…

To work around this problem, copy the attached file lt_tx_data.sv to the following directory:

xcvr_10gbase_kr_sim/altera_xcvr_10gbase_kr/cadence/

This problem will be fixed in a future version of the 10GBASE-KR PHY Intel FPGA IP.