Article ID: 000085145 Content Type: Troubleshooting Last Reviewed: 03/11/2013

Why are output clocks missing from my PLL megafunction when I regenerate in the Quartus II software 12.0 or later?

Environment

    Quartus® II Subscription Edition
    PLL
BUILT IN - ARTICLE INTRO SECOND COMPONENT
Description

Due to a change in the Quartus® II software versions 12.0, regenerating Altera PLL (altera_pll) megafunctions created in the Quartus II software versions 11.1 SP2 and earlier may result in variation files that are missing some of the output clocks. This may occur regardless of whether the megafunction is regenerated using the MegaWizard™ Plug-In Manager GUI or the qmegawiz command line. This problem can affect any design using the Altera PLL megafunction including design targeting Stratix® V, Arria® V and Cyclone® V devices.

For example, if you have a Stratix V Altera PLL megafunction generated in the Quartus II software version 11.1 SP2, and you try to regenerate the PLL in the Quartus II software version 12.0, the megafunction may lose its configuration settings and revert to a single clock output.

The Altera PLL megafunction parameters in the Quartus II software version 12.0 are different than the parameters in the Quartus II software version 11.1 SP2 and earlier. Therefore, the megafunctions are incompatible between versions.

Resolution To work around this change, create new megafunctions for PLLs in your design. The Quartus II software versions 12.1 and later include a warning that previous versions of the Altera PLL megafunction are no longer compatible.

Related Products

This article applies to 14 products

Stratix® V GX FPGA
Arria® V ST SoC FPGA
Arria® V SX SoC FPGA
Arria® V GX FPGA
Cyclone® V SE SoC FPGA
Cyclone® V ST SoC FPGA
Cyclone® V SX SoC FPGA
Stratix® V GS FPGA
Cyclone® V GT FPGA
Stratix® V GT FPGA
Cyclone® V E FPGA
Cyclone® V GX FPGA
Arria® V GT FPGA
Stratix® V E FPGA

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