Article ID: 000084815 Content Type: Troubleshooting Last Reviewed: 02/08/2012

Incorrect Definition of npor Reset in the Stratix V Hard IP for PCI Express User Guide

Environment

  • Quartus® II Subscription Edition
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT

    Critical Issue

    Description

    The Stratix V Hard IP for PCI Express User Guide define npor as an active high reset signal; however, npor is active low.

    Resolution

    No workaround is required. This issue is fixed in version 12.0 of the Stratix V Hard IP for PCI Express User Guide.

    Related Products

    This article applies to 1 products

    Stratix® V FPGAs

    Disclaimer

    1

    All postings and use of the content on this site are subject to Intel.com Terms of Use.