Article ID: 000084624 Content Type: Troubleshooting Last Reviewed: 11/12/2015

You May Encounter Difficulty Achieving Timing Closure for QDR-IV Interfaces on Arria 10 Devices

Environment

  • Intel® Quartus® Prime Pro Edition
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT

    Critical Issue

    Description

    You may encounter difficulty in achieving timing closure for QDR-IV interfaces on Arria 10 devices.

    Resolution

    The workaround for this issue is to run multiple seeds to achieve timing closure.

    This problem will be fixed in a future version.

    Related Products

    This article applies to 1 products

    Intel® Arria® 10 FPGAs and SoC FPGAs

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