Article ID: 000084551 Content Type: Troubleshooting Last Reviewed: 06/30/2014

Is the DFE_control register a Read (R) or Write (W) location in Stratix V GX, GS, and GT devices?

Environment

  • Stratix® V GX FPGA
  • Stratix® V GS FPGA
  • Stratix® V GT FPGA
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Description

The DFE_control register is a Read (R) only location in Stratix® V GX, GS, and GT devices.

This is incorrectly shown as RW in ver 1.7 of the Altera® Transceiver PHY IP Core User Guide. 

This will be updated in a future revision of the Altera Transceiver PHY IP Core User Guide.

Resolution

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