Article ID: 000084338 Content Type: Troubleshooting Last Reviewed: 07/16/2013

Why does the address range of my Qsys PIO, Interval timer and Jtag Uart change when I add a new Avalon-MM master?

Environment

    Quartus® II Subscription Edition
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Description

An issue has been identified where the address range of some Altera® slave peripherals is dependant on the data-width of the largest Avalon®-MM master in the project.

The following IP's may be effected:

  • DMA Controller
  • Remote Update Controller
  • Alpha Blending Mixer
  • Control Synchronizer
  • Switch
  • Clocked Audio Input
  • Clocked Audio Output
  • SPI (3 wire serial)
  • UART
  • JTAG Uart
  • Mutex
  • Performance Counter Unit
  • Character LCD
  • Interval Timer
  • PIO (Parallel I/O)
  • USB Data Streamer Controller
Resolution

This issue may be fixed in a future version of the Quartus® II software.

Related Products

This article applies to 1 products

Intel® Programmable Devices

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