Article ID: 000084017 Content Type: Error Messages Last Reviewed: 04/01/2015

Error (12006): Node instance "rs_hip" instantiates undefined entity "altpcierd_hip_rs"

Environment

  • Quartus® II Subscription Edition
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description Due to a problem with version 14.1 of the Quartus® II software, you may see this error when the Arria® 10 PCI Express® Hard IP with the config bypass feature enabled.
    Resolution

    Copy the altpcierd_hip_rs.v file from the <Quartus II install>/ip/altera/altera_pcie/altera_pcie_a10_ed/example_design/verilog/chaining_dma directory to the <variation>/altera_pcie_a10_hip_141/synth directory. Add the following line to your <variation>/<variation>.qip file:
    set_global_assignment -library <variation> -name VERILOG_FILE [file join $::quartus(qip_path) "altera_pcie_a10_hip_141/synth/altpcierd_hip_rs.v"]

    This problem is scheduled to be fixed in a future version of the Quartus II software.

    Related Products

    This article applies to 3 products

    Intel® Arria® 10 GX FPGA
    Intel® Arria® 10 GT FPGA
    Intel® Arria® 10 SX SoC FPGA

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