Article ID: 000083611 Content Type: Troubleshooting Last Reviewed: 01/15/2014

Possible Read/Write Errors for DDR2 and DDR3 Hard Memory Controllers on Arria V and Cyclone V Devices at Low Vcc and Extreme Temperatures

Environment

  • Quartus® II Subscription Edition
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT

    Critical Issue

    Description

    This problem affects DDR2 and DDR3 products.

    The hard memory controller on Arria V GX, Arria V GT, Arria V SoC, Cyclone V GX, Cyclone V GT, and Cyclone V SoC devices might exhibit read/write errors during normal operation under low Vcc core voltage and extremely hot or cold temperatures.

    The following protocols and frequencies are affected:

    • For Arria V GX/GT/SoC devices, DDR2 at 375-400 MHz and DDR3 at 375-533 MHz
    • For Cyclone V devices, DDR2 at 300-400 MHz and DDR3 at 300-400 MHz.
    Resolution

    If you are using Arria V GX, Arria V GT, Cyclone V GX, or Cyclone V GT devices, the workaround is to install the Quartus II software version 13.0 SP1 DP5 patch, and then regenerate the external memory interface hard memory controller IP and recompile the design.

    If you are using Cyclone V SoC or Arria V SoC devices, you should install the Quartus II software version 13.1, and then regenerate the external memory interface hard memory controller IP and recompile the design.

    This issue will be fixed in a future version.

    Related Products

    This article applies to 2 products

    Arria® V FPGAs and SoC FPGAs
    Cyclone® V FPGAs and SoC FPGAs

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