Critical Issue
Description
Some 40GbE MAC and PHY IP Core example projects compiling Stratix IV device designs for the 12.0 release of the Quartus II software generate the following Critical Warning:
Critical Warning: Register-to-register paths between
different clock domains is not recommended if one of the clocks
is from GXB receiver channel.
The error is generated by the following projects:
quartus_synth\wrappers\alt_e40_phy\alt_e40_phy_siv.qpfquartus_synth\example_design\alt_e40_adapter_top_siv\alt_e40_adapter_top_siv.qpfquartus_synth\example_design\alt_e40_top_siv\alt_e40_top_siv.qpf
The Critical Warning is caused by an improperly specified false path in the following .sdc files:
quartus_synth\wrappers\alt_e40_phy\alt_e40_phy_siv.sdcquartus_synth\example_design\common\common_timing.sdc
Resolution
This issue is fixed in the 12.1 Quartus software release of the IP core.
For the 12.0 release of the IP core, the Critical Warning is caused by an improperly specified false path in the following .sdc files:
quartus_synth\wrappers\alt_e40_phy\alt_e40_phy_siv.sdcquartus_synth\example_design\common\common_timing.sdc
In these .sdc files, the following block of code:
if {$::TimeQuestInfo(nameofexecutable) eq "quartus_fit"}
{
# ok
} else {
set_false_path -from [get_keepers {*lane_marker_lock*vlane_num[*]}
]
}
Should be replaced with the following block of code:
set_false_path -from [get_keepers {*lane_marker_lock*vlane_num[*]}
]
This will prevent the Critical Warning.