Article ID: 000083519 Content Type: Troubleshooting Last Reviewed: 02/13/2006

Why do I get the following error when using MAX PLUS® II software to compile a VHDL design file: "Unsupported feature error: aggregate is unsupported"?

Environment

BUILT IN - ARTICLE INTRO SECOND COMPONENT
Description For example, if you have the following statements in your design file: 
when "00000" =>

        x := conv_integer(signed(a));
        f

For support of these conversion functions, please compile your code in Quartus® II software or a software tool from any of Altera's EDA partners.

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