Description
For APEX II devices, the voltage levels that constitute a logic level "1" are as
follows:
VCCSEL and nIO_PULLUP can always be pulled up to 1.5, 1.8, 2.5, and 3.3 V.
The logic level "1" of the PLL_ENA is controlled by the VCCSEL pin setting.
For more information about the VCCSEL pin, see the solution Does the VCCSEL pin on an APEX II device select which input buffer the PLL_ENA pin uses?