Article ID: 000083065 Content Type: Troubleshooting Last Reviewed: 03/20/2014

Why do I see errors when compiling the Video Sync Generator in Quartus II 13.0 and 13.0sp1.

Environment

    Quartus® II Subscription Edition
BUILT IN - ARTICLE INTRO SECOND COMPONENT
Description

Due to a problem in the Quartus® II software version 13.0 and 13.0sp1,  the Video Sync Generator component does not declare HDL parameters for Qsys systems generated in Verilog.

 

Resolution

To workaround this issue manually remove the 2 lines below in the altera_avalon_video_sync_generator_hw.tcl file, refresh the Qsys systemand regenerate the Qsys system.

package require -exact sopc 9.1

set_module_property ANALYZE_HDL "false"

This problem is fixed beginning with the Quartus II software version 13.1.

 

Related Products

This article applies to 1 products

Intel® Programmable Devices

1

Need more help?

Contact support

Disclaimer

1

All postings and use of the content on this site are subject to Intel.com Terms of Use.