How do I initialize on-chip memory in my Nios II embedded processor design during simulation or for running on a target board?

You can use the Nios II IDE to generate memory initialization files for simulation and memory content files for running on a target board. Nios II IDE generates .dat files during a software build that can be used with an RTL simulator. See AN 351: Simulating Nios II Embedded Processor Designs for details. Nios II IDE also generates executable format files during a software build that can be downloaded to the target board. It also generates memory initialization files that can be included in the .sof (Altera FPGA programming file) file during Quartus II compilation.