Description
The alt_max2.vo file is generated by the MAX PLUS II software when it writes Verilog HDL netlist files for post place-and-route simulation in third-party EDA simulators. This file is used to map the primitives in the <design>.vo file to the equivalent functions in the simulation software. The contents of the alt_max2.vo file are not dependent on the user design, rather, all primitive functions are always written to this file.
Environment
BUILT IN - ARTICLE INTRO SECOND COMPONENT