Article ID: 000082931 Content Type: Error Messages Last Reviewed: 06/23/2014

Critical Warning: Timing analysis was performed on core hps_sdram_p0 using Quartus II v13.1 with a preliminary timing model and constraints..

Environment

    Quartus® II Subscription Edition
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Description

Due to a problem in the Quartus® II software version 13.1 Update 3, you may see the the following critical warning when compiling your Cyclone® V SOC HPS design despite the timing model being final.

Critical Warning: Timing analysis was performed on core hps_sdram_p0 using Quartus II v13.1 with a preliminary timing model and constraints. You must regenerate this IP in a future version of Quartus II to update the timing constraints to match the timing mode

Resolution

It is safe to ignore this critical warning.

This problem is scheduled to be fixed in a future release of the Quartus II software.

Related Products

This article applies to 1 products

Intel® Programmable Devices

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