Article ID: 000082096 Content Type: Troubleshooting Last Reviewed: 08/23/2023

Why does the VCS simulation of the Intel® Stratix® 10 PCIe* Hard IP return this RT Warning: More than one conditions match in the 'unique case' statement?

Environment

    Intel® Quartus® Prime Pro Edition
    Avalon-ST Intel® Stratix® 10 Hard IP for PCI Express
    Avalon-MM Intel® Stratix® 10 Hard IP for PCI Express
BUILT IN - ARTICLE INTRO SECOND COMPONENT
Description

VCS simulation of the Intel® Stratix® 10 PCIe* Hard IP returns warnings of the type shown below.

 

Warning-[RT-MTOCMUCS] More than one condition match in statement

/linux64/quartus//eda/sim_lib/synopsys/ct1_hssi_atoms_ncrypt.sv, 26

  More than one condition matches are found in 'unique case' statement inside

  pcie_example_design_tb.pcie_example_design_inst.dut.dut.altera_pcie_s10_hip_ast_pipen1b_inst.wys.ct1_hssi_x16_pcie_encrypted_inst.PROTECTED.next_state_PROC,

  at time 109295007000fs

 

The simulator is reporting the violation when considering transient values of the input signals instead of considering only the stable values for these inputs.  Therefore there is no functional issue, and the warning can be safely ignored.

Resolution

To work around this problem and suppress this warning, include the following user-defined option when running vcs_setup.sh:

 

sh vcs_setup.sh USER_DEFINED_COMPILE_OPTIONS="" USER_DEFINED_ELAB_OPTIONS="-xlrm\ uniq_prior_final"

Related Products

This article applies to 1 products

Intel® Stratix® 10 FPGAs and SoC FPGAs

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