Article ID: 000081628 Content Type: Troubleshooting Last Reviewed: 12/17/2014

Why does the external memory interface calibration hang after a CvP update when using the DDR3, DDR2 or LPDDR2 UniPHY hard memory controller?

Environment

  • Quartus® II Subscription Edition
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    Description

    Due to a problem in the Quartus® II software, when configuring with an SOF file through the Configuration via Protocol (CvP) method with a design that includes the UniPHY hard memory controller, you may observe that calibration fails after the CvP update occurs. The external memory interface calibration status signals local_cal_fail and local_cal_success never become asserted.

    This issue occurs because the content of the M20K/M10K RAM memory used for the calibration process has been corrupted after the CvP update occurred.

    Resolution Contact Altera for details of the workaround.

    Related Products

    This article applies to 11 products

    Cyclone® V SX SoC FPGA
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    Cyclone® V ST SoC FPGA
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