To estimate how long fabric configuration will take using CvP update mode you need to calculate the fabric size and understand the expected configuration data rate.
Uncompressed .rbf Sizes for Altera® FPGAs can be found in both the respective device handbooks, and in the Configuration via Protocol (CvP) Implementation in Altera FPGAs User Guide (PDF).
To ascertain the fabric size for any given device, simply subtract the IO ring (IOCSR) rbf size from the total configuration rbf size.
- Regardless of chosen PCI Express link width or rate, the maximum possible CvP rate is 3Gbps.
Achievable CvP rates for specific PCI Express configurations are given below, but actual link utilization achieved is system dependant.
CvP configuration rate depends on the HardIP configuration being used:
When using a 32bit register in the application layer, 8% Link Utilization should be expected.
When using a 64bit register in the application layer, 14.4% Link Utilization should be expected
Gen1x1 = 0.16 or 0.288Gbps
Gen1x4 = 0.64 or 1.152Gbps
Gen1x8 = 1.28 or 2.304Gbps
Gen2x1 = 0.32 or 0.576Gbps
Gen2x4 = 1.28 or 2.304Gbps
Gen2x8 = 2.56 or 3(max)Gbps
Hence by knowing the fabric rbf size, and using the expected CvP configuration rate, the CvP fabric configuration time can be calculated.
Note that additionally compression could be used to reduce the fabric file size, and hence reduce configuration time further.