Article ID: 000081276 Content Type: Troubleshooting Last Reviewed: 04/08/2013

Does the Quartus II software version 11.1 SP2 include all the fixes from the Quartus II software version 11.1 SP1 device patch 1.dp11?

Environment

    Quartus® II Subscription Edition
BUILT IN - ARTICLE INTRO SECOND COMPONENT
Description

No, the Quartus® II software version 11.1 SP2 does not include all the fixes for Stratix® V and Arria® V devices from the Quartus II software version 11.1 SP1 device patch 1.dp11. Fixes for the following issues in the readme for device patch 1.dp11 are not included:

-----------------
Issue 18 (31645)
-----------------
Quartus II triggers the following error when openning Chip Planner for
Stratix V designs with DQS FF:
Fatal Error: Access Violation at 0X000000001CED28C5

-----------------
Issue 23 (32785)
-----------------
Alt_syncram is missing some timing paths for Stratix V M20K ECC modes.

-----------------
Issue 26 (33894)
-----------------
Internal Error: Sub-system: ASMCC,
File: /quartus/comp/asmcc/asmcc_bitfield.cpp, Line: 882
Assembler bitfield error: Found conflicting assignments for CRAM address; address = 4935431

-----------------
Issue 27 (34197)
-----------------
Internal Error: Sub-system: ASMIO,
File: /quartus/comp/asmio/asmio_oct.cpp, Line: 714
!is_differential

-----------------
Issue 28 (34212)
-----------------
Address decoder in Stratix V soft XAUI had incorrect connection,
making registers in address range 0x40 -0x7F inaccessible.
Resolution For all the current fixes for Stratix V and Arria V devices, install the Quartus II software version 11.1 SP2 and install the latest device patch from the related solution below.

Related Products

This article applies to 10 products

Stratix® V FPGAs
Arria® V FPGAs and SoC FPGAs
Stratix® V E FPGA
Stratix® V GS FPGA
Stratix® V GT FPGA
Stratix® V GX FPGA
Arria® V SX SoC FPGA
Arria® V ST SoC FPGA
Arria® V GX FPGA
Arria® V GT FPGA

1