Article ID: 000080940 Content Type: Troubleshooting Last Reviewed: 09/11/2012

Why has the UniPHY CSR interface access latency increased in 11.0 and later version of the IP compared to 10.1 version of the IP?

Environment

  • Quartus® II Subscription Edition
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description An increase in access is expected in 11.0 and later version of the IP due to the change in Configuration and Status Register (CSR) architecture. Before 11.0 version, Avalon-MM interface from the controller was exposed to the PHY, but in 11.0 and later version, Avalon-MM bridge and merlin fabric is used to export the Avalon-MM interface along with the PHY CSR.
    Resolution

     

    Related Products

    This article applies to 3 products

    Stratix® IV GX FPGA
    Stratix® III FPGAs
    Stratix® IV E FPGA

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