Article ID: 000080528 Content Type: Troubleshooting Last Reviewed: 11/15/2011

Hold Time Requirement Not Met in Stratix V Devices

Environment

  • Stratix® V FPGAs
  • Quartus® II Subscription Edition
  • Ethernet
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT

    Critical Issue

    Description

    Designs that target Stratix V devices may not meet hold time requirements.

    This issue affects all designs that targets Stratix V devices.

    Resolution

    Run a seed sweep using the Design Space Explorer.This issue will be fixed in a future version of the Triple-Speed Ethernet MegaCore function.

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