Article ID: 000080277 Content Type: Troubleshooting Last Reviewed: 04/11/2023

Cyclone® V Device Overview: Known Issues

Environment

    Intel® Quartus® Prime Design Software
    I O
BUILT IN - ARTICLE INTRO SECOND COMPONENT
Description

Issue 75520: Version 2.0

The device overview currently states that unused voltage reference (VREF) pins that can be configured as user I/Os. In Cyclone® V devices, the VREF pin is a dedicated power pin. It cannot be used as user I/O when voltage reference I/O standards are not used in the bank. This is fixed in the coming release to reflect the correct VREF pin description.

 

Resolution

.

Related Products

This article applies to 6 products

Cyclone® V GT FPGA
Cyclone® V ST SoC FPGA
Cyclone® V GX FPGA
Cyclone® V SX SoC FPGA
Cyclone® V E FPGA
Cyclone® V SE SoC FPGA

1

Need more help?

Contact support

Disclaimer

1

All postings and use of the content on this site are subject to Intel.com Terms of Use.