Critical Issue
Description
The RapidIO II IP core Port 0 Control CSR (offset
0x15C) LOG_TRANS_ERR_IRQ_EN, PORT_FAIL_IRQ_EN,
and PORT_DEGR_IRQ_EN bits should control whether or
not the IP core generates an interrupt in response to the input
signals logical_transport_error, port_failed,
and port_degraded, respectively.
However, the three register bits have no effect. Instead,
- The
logical_transport_errorsignal always triggers an interrupt. - The
port_failedsignal never triggers an interrupt. - The
port_degradedsignal never triggers an interrupt.
Resolution
This issue has no workaround.
This issue is fixed in version 14.1 of the RapidIO II MegaCore function.