Article ID: 000080169 Content Type: Error Messages Last Reviewed: 08/07/2023

Error: operand 0 must be FPSCR --'vmsr fpexc, r0'

Environment

    Quartus® II Subscription Edition
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Description

Due to a problem in SoC Embedded Design Suite, this error may be seen during ARM DS-5 Altera Edition compilation when vmsr fpexc, r0 is used in .s assembly code.

Resolution

To workaround this problem, download the latest Mentor Sourcery CodeBench Lite package from www.Mentor.com and update the gcc compiler in <Quartus II Installation>/embedded/host_tools/mentor/gnu/arm/baremetal.

This problem is fixed starting with release 15.1 of SoC Embedded Design Suite.

Related Products

This article applies to 5 products

Arria® V ST SoC FPGA
Arria® V SX SoC FPGA
Cyclone® V SE SoC FPGA
Cyclone® V ST SoC FPGA
Cyclone® V SX SoC FPGA

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